Digital Systems Design

: Arithmetic circuits – Data paths, arithmetic/logic unit (ALU), shifters; computer design fundamentals – introduction to computer design, Instructions set architecture (ISA); introductory HDL – 1 (Verilog or VHDL) – timing in Combinational Circuits, Hazards and Glitches, Review of sequential logic; HDL Behavioural, Sequential coding, and ModelSim – design using flip-flop and latches, state machines, state reduction, timing issues, design of adders and subtractors, carry lookahead adders, serial adders, array multipliers, critical paths, Booth and Radix-4 encoded signed multipliers, further VHDL modeling, parameterization; FPGA Implementations – LFSR, BRM, Function Generators, Design Examples, Faults and Testability – BIST and SCAN techniques, Design for test – JTAG, Advanced HDL – Memories and Register Files, Design Examples

Hours: XYZ where X = Lecture, Y = Lab, Z = Credit
All hours are per week.
3 Lab hours constitute 1 credit hour
1 credit hour implies 1 lecture of 50mins per academic week. 16 weeks in total.
Pre-Requisite courses are courses required to be completed before this course may be taken
Co-Requisite courses are courses required to be taken along with this course